Listes Recherche d'emploi
Physical Design Engineer
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Ho Chi Minh
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Experienced (Non - Manager)
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_Permanent_
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Bachelor
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3 - 5 _year_
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Négociable
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Arts / Creative Design, Electrical / Electronics / Electro Refrigeration, Maintenance
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1
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24/12/2025
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hang.nguyentt@careerviet.vn
_Job Benefit_
- Laptop
- Insurance
- Travel opportunities
- Allowances
- Health checkup
- Training & Development
- Annual Leave
Description du poste
1. APR / Physical Implementation
- Take customer netlists and execute the complete physical design flow from floorplanning to chip finishing (GDSII).
- Perform partitioning, placement optimization, CTS, routing, and post-route optimization.
- Solve congestion issues and balance PPA (performance, power, area).
2. STA / Timing Closure
- Run static timing analysis (STA) across multi-corner and multi-mode scenarios.
- Debug and fix setup, hold, and DRVs.
- Perform timing ECOs and work closely with RTL/logic teams.
3. Physical Verification (PV)
- Run and debug DRC, LVS, LVL, PERC, ERC checks.
- Ensure layout-to-netlist consistency.
- Handle density, antenna, and manufacturability checks.
4. Power / IR Drop / EM Analysis
- Perform IR drop and EM analysis.
- Identify weak PDN areas, voltage drops, and high resistance paths.
- Propose improvements to PDN and optimize power.
5. Automation & Customer Support
- Develop automation scripts (TCL, Perl, Shell, or Python).
- Provide technical support and communication with customers and internal teams.
- Contribute to methodology development and tool evaluation.
6. Project Quality & Collaboration
- Follow best practices and sign-off checklists.
- Track progress, identify risks, and report status.
- Mentor junior engineers when needed.
Exigence de l'emploi
- Bachelor’s or higher degree in EE/Telecom/VLSI/Microelectronics.
- Minimum 3 years’ hands-on experience in physical design (Netlist → GDSII).
- Proficient in ICC2, Innovus, PrimeTime, RedHawk/Voltus, Calibre.
- Strong STA, timing ECO, and sign-off closure skills.
- Experience in IR/EM analysis and fixing power integrity issues.
- Strong scripting (TCL, Perl, Shell, Python).
- Good English communication skills.
Nice-to-have: Advanced technology node experience (28nm, 16nm, FinFET), tape-out experience, low-power design, and leadership skills.
_more_infomation_
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